Maarten Van Rompuy is a Design and Implementation Lead with 12 years of deep SoC verification and ASIC design experience, currently helping define the EU Chips Design Platform and its tape-out automation. He specializes in SystemVerilog/UVM testbench architecture and reusable verification IP optimized for emulation, and has a strong track record of introducing simulation acceleration and DevOps improvements across teams. Maarten pairs technical leadership with hands-on scripting (Python, Tcl, bash) to automate flows and improve developer tooling, and he has bridged system-level MBSE practices into ASIC requirements and verification. His background spans industry leaders (imec, Nokia, Cochlear) where he led verification methodology shifts like Documentation-as-Code, unit testing for hardware, and requirements traceability. Based in Antwerp, he combines pragmatic engineering with platform-level thinking—often translating low-level emulator constraints into scalable verification IP and automated tape-out processes.
12 years of coding experience
9 years of employment as a software developer
Master of Industrial Sciences: Electronics Engineering (Leuven) Electronics Engineering, Master of Industrial Sciences: Electronics Engineering (Leuven) Electronics Engineering at Katholieke Universiteit Leuven
Bachelor of Science in Industrial Sciences Electronics Engineering, Bachelor of Science in Industrial Sciences Electronics Engineering at Groep T - Internationale Hogeschool Leuven
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Maarten Van Rompuy - Design And Implementation Lead