Maciej Kwiatkowski
Hardware Engineer at Optiver
Austin, Texas, United States
Summary
👤
Senior🎓
Top SchoolMaciej Kwiatkowski is a hardware engineer with 11+ years designing high-speed (25G) networking, low-latency trading, and advanced X-ray imaging systems centered on cutting-edge FPGAs and custom ASIC interfaces. He blends deep RTL expertise in VHDL/Verilog with multilayer, high-density PCB layout and signal/power integrity simulation (HFSS), and complements firmware with embedded C/C++ and automation in Python. His career spans research labs and industrial trading environments (SLAC, CERN, Optiver), delivering production FPGA-based systems with multi-gigabit optical links, fast ADC/DAC chains, and power-constrained analog front ends. Notably skilled at translating demanding physical-layer constraints into reliable digital IP cores, he also brings supervisory and verification experience against safety standards like IEC-61508. Based in Austin, TX, he combines academic rigor (MSc, PhD-level electronics training) with a pragmatic record of deploying complex electronics in both research and commercial settings.
11 years of coding experience
15 years of employment as a software developer
Warsaw University of Technology
Github Skills (11)
fpga10
firmware10
hdl10
lattice10
asic10
python10
vhdl10
data-acquisition9
abstraction8
hardware8
data-abstraction6
Programming languages (2)
Github contributions (5)
slaclab/lz-test-stand
Jan 2018 - Nov 2020
Contributions:1 PR, 52 pushes in 2 years 10 months
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