Maciej Pijanowski
Engineering Manager at 3mdeb - Embedded Systems Consulting
Gdańsk, Pomeranian Voivodeship, Poland
Summary
🤩
Rockstar🎓
Top SchoolMaciej Pijanowski is an Engineering Manager with a decade of experience leading embedded systems teams at 3mdeb, progressing from engineer to team leader and now manager while staying hands-on with low-level platform work. He holds both B.Eng. and M.Eng. degrees from Gdańsk University of Technology and combines technical depth in bootloader, firmware and kernel configuration with practical delivery of Yocto/OpenEmbedded solutions for RISC-V platforms. Maciej contributes to open-source projects such as meta-riscv—synchronizing DTS files and updating OpenSBI/U-Boot recipes—and improves developer experience through clear technical documentation, for example in swupdate. Based in Gdańsk, he blends systems-level debugging and firmware integration knowledge with people leadership, often translating hardware-specific constraints into reproducible software processes.
10 years of coding experience
2 years of employment as a software developer
Bachelor of Engineering (B.Eng.), Electrical and Electronics Engineering, Excellent, Bachelor of Engineering (B.Eng.), Electrical and Electronics Engineering, Excellent at Gdańsk University of Technology
English, Polish
Github Skills (15)
risc-v10
embedded10
device-tree10
dts10
u-boot10
sys10
grub10
dt10
yocto10
documentation10
recipe9
boot9
linux-kernel9
openembedded9
bootloader9
Programming languages (22)
Github contributions (5)
sbabic/swupdate
Apr 2017 - Apr 2021
Software Update for Embedded Systems
Role in this project:
Technical Writer
Technical WriterContributions:5 commits in 4 years
Contributions summary:Maciej primarily contributed to the project's documentation, focusing on the `doc/source` directory. They corrected links, wrapped lines for readability, and fixed various typos within the documentation. Furthermore, the user updated documentation related to bootloader abstraction and GRUB support, as well as signing images within a Yocto environment. The changes included updates to the overview, sw-description, and related documentation files.
luafirmware-updatefotaindustrial-linuxlinux
riscv/meta-riscv
Apr 2021 - May 2021
OpenEmbedded/Yocto layer for RISC-V Architecture
Role in this project:Embedded Systems Engineer / IoT Developer
Embedded Systems Engineer / IoT DeveloperContributions:8 reviews, 12 commits, 1 PR in 4 days
Contributions summary:Maciej's primary focus involves contributing to the `riscv/meta-riscv` repository, which is a Yocto layer for RISC-V architecture. They synchronized Device Tree Source (DTS) files from U-Boot, specifically for the BeagleV board, indicating hardware-specific configuration. The user also updated OpenSBI and U-Boot recipes, along with kernel configurations, demonstrating a deep understanding of the boot process and low-level system initialization related to the RISC-V platform. These changes include integrating and deploying firmware components.
risc-vyocto-metaopenembedded-layerriscvyocto-layer
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