Mahyar Samani
Graduate Student Researcher
Davis, California, United States
Summary
👤
Senior🎓
Top SchoolMahyar Samani is a PhD student and Graduate Student Researcher in ECE/CS at UC Davis with 11 years of engineering experience and a BSc from Sharif University of Technology. He focuses on computer architecture, parallel and heterogeneous computing, and domain-specific accelerators, blending academic research with practical system-level contributions. As a gem5 contributor and former NVIDIA GPU architecture intern, he has hands-on experience integrating memory models (DRAMSim2/3), refactoring core simulator code, and adding ISA and statistics support for rigorous architectural validation. Comfortable working across simulator back-ends and hardware-focused software, he brings both compiler-level understanding and low-level microarchitectural insight to performance-oriented projects.
11 years of coding experience
2 years of employment as a software developer
Doctor of Philosophy - PhD, Computer Science, Doctor of Philosophy - PhD, Computer Science at University of California, DavisBachelor's degree, Computer Engineering, 3.4 / 4, Bachelor's degree, Computer Engineering, 3.4 / 4 at Sharif University of Technology
English
Github Skills (17)
simulation10
c-language10
main-memory10
architecture10
simulations10
system10
architectures10
cprogramming-language10
testing9
performance-analytics9
performance-monitor9
performance-measurement9
x869
performance-monitoring9
performance-analysis9
Programming languages (8)
Github contributions (5)
gem5/gem5
Nov 2019 - Aug 2022
The official repository for the gem5 computer-system architecture simulator.
Role in this project:
Back-end Developer
Back-end DeveloperContributions:19 reviews, 32 commits, 16 PRs in 2 years 9 months
Contributions summary:Mahyar contributed to the gem5 computer-system architecture simulator by modifying and removing code related to integer math functions and adding support for x86 horizontal subtraction instructions. Their work involved refactoring existing code, removing dead code, and integrating and adapting new components like DRAMSim2 and DRAMSim3 memory models. The user also updated statistics reporting for various branch prediction models, CPU traffic generators and memory modules, and added new tests for verifying memory module functionality.
storedsimulationupstreamsimulatorgem5-simulator
mahyarsamani/gem5
Jul 2023 - Mar 2025
The official repository for the gem5 computer-system architecture simulator.
Contributions:64 pushes, 38 branches in 1 year 8 months
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