Manpreet Singh is a Senior FPGA Engineer based in Austin with over a decade of hands-on experience designing and optimizing FPGA solutions for low-latency, high-reliability systems. He has driven FPGA architecture and VHDL development across trading and broadcast products at Chicago Trading Company, Clear Street Markets, and Evertz, bringing expertise in both Xilinx/AMD and Intel/Altera toolchains. His background combines algorithm design, RTOS-enabled C/C++ firmware, and pragmatic optimization—reducing logic utilization and improving timing closure while profiling power at the silicon level. As a University of Waterloo M.A.Sc. graduate, he delivered an in-depth, measurement-driven LDPC decoder study that blends academic rigor with production sensibilities. Comfortable reviewing and refactoring legacy code and build flows (Tcl/Python/Bash/make), he’s equally at home leading small engineering teams and diving into bit-level performance tuning. Colleagues describe him as an engineer who pairs theoretical depth with practical trade-floor and broadcast product delivery.
11 years of coding experience
10 years of employment as a software developer
B. Tech, Electronics and Communication Engg., B. Tech, Electronics and Communication Engg. at National Institute of Technology Kurukshetra
M.A.Sc, Circuits and Systems, FPGA, M.A.Sc, Circuits and Systems, FPGA at University of Waterloo
Contributions:1 PR, 28 pushes, 3 branches in 2 years
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