Marc Randolph
Senior Hardware And FPGA Design Engineer at Tellabs
Richardson, Texas, United States
Summary
🤩
Rockstar🎓
Top SchoolMarc Randolph is a Senior Hardware and FPGA Design Engineer with over two decades of hands-on experience delivering high-speed communications equipment for Ethernet, SONET, and ATM systems. He combines deep low-level expertise in high-speed FPGA and PCB design with systems-level thinking about network performance, enabling products that push port and power density limits into production. Marc has led hardware and FPGA efforts across tier-one networking firms including Tellabs and Dell Force10, driving designs from concept and architecture through debug and manufacturing. Based in Richardson, Texas, he holds an MS from Texas A&M and is willing to lend his schematic and layout expertise to peer reviews—a practical signal of his collaborative, detail-oriented approach.
8 years of coding experience
21 years of employment as a software developer
Master of Science - MS, Master of Science - MS at Texas A&M University
Github Skills (106)
lit-element10
custom-component10
python10
animated10
bash10
home-assistant10
forecast10
google-home10
acme-protocol10
animation10
mqtt10
polymer10
gradient10
btle10
shell10
Programming languages (7)
Github contributions (5)
mrand/frontend
Dec 2020 - Feb 2026
:lollipop: Frontend for Home Assistant
Contributions:20 pushes, 9 branches in 5 years 3 months
user-interfacelit-elementassistantlollipophome-assistant
mrand/smart_meter_texas
Apr 2020 - Dec 2020
Contributions:40 commits, 40 pushes, 1 branch in 8 months
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