Marcos Oliveira
MTS, ASIC Design at Netpreme
Geneva, Geneva, Switzerland
Summary
👤
Senior🎓
Top SchoolMarcos Oliveira is a Team Leader Electronics Engineer with over a decade of deep FPGA and SoC design experience, currently leading electronics teams at CERN and Brookhaven National Laboratory. He specializes in low-latency synchronous systems, high-speed serial links, automated design flows and large-scale in-system verification, having synchronized 100+ links per FPGA and automated characterization of hundreds of optical transceivers. Marcos pairs research-grade rigor (PhD-level work at EPFL) with hands-on hardware and firmware delivery across trigger and data-acquisition systems for ATLAS. He is passionate about teaching and scientific research and brings a long-standing fascination with miniaturized systems and their societal impact. Known for bridging PCB, FPGA, and low-level software domains, he often drives automation to scale complex test and production tasks. Colleagues value him for turning experimental prototypes into robust, production-ready electronics in high-stakes research environments.
10 years of coding experience
15 years of employment as a software developer
Doctor of Science - PhD, Electrical and Electronics Engineering, Doctor of Science - PhD, Electrical and Electronics Engineering at EPFLMaster in Electrical Engineering, Electrical and Electronics Engineering, Master in Electrical Engineering, Electrical and Electronics Engineering at Universidade Federal de Juiz de Fora
Portuguese, English, French
Github Skills (27)
rio10
que10
voc9
js9
html8
python8
php8
proxy8
css8
java8
csharp8
git7
javascript7
cloud-native6
github6
Programming languages (3)
Github contributions (5)
marcosmariano/VisaoComputacionalTCC
Apr 2018 - Apr 2018
Contributions:7 commits, 5 pushes, 1 branch in 1 day
marcosmariano/node-api
Mar 2019 - Dec 2021
Contributions:1 push, 1 branch in 2 years 9 months
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