Marek Pikuła is an embedded engineer with 11 years’ experience applying FPGA, kernel and systems design to real-world products from motor-control SoCs to 3D printer electronics. Based in Eindhoven, he blends low-level platform and kernel work at Samsung with FPGA design and integration experience from roles at TRINAMIC and Embevity. Marek contributes to open-source projects—improving Unicode handling and modernizing C++ in Xournal++ and extending Verilog/SystemRDL generation in SpinalHDL—showing a practical focus on tooling and hardware description flows. He pairs hands-on board- and firmware-level debugging with DevOps practices (“FPGA developer by day, DevOps engineer by night”), runnning Docker-based infrastructure for embedded services. His background in electronics and a side training in classical music hint at disciplined attention to detail and pattern recognition that he brings to hardware-software co-design.
11 years of coding experience
2 years of employment as a software developer
High school diploma, Mathematics and physics, High school diploma, Mathematics and physics at Edward Dembowski High School No. I in Gliwice, Poland
BSc, Electronics and Telecommunication, BSc, Electronics and Telecommunication at Silesian University of Technology
Musician, Piano and classical singing, Musician, Piano and classical singing at Ludomir Różycki Music School in Gliwice
Xournal++ is a handwriting notetaking software with PDF annotation support. Written in C++ with GTK3, supporting Linux (e.g. Ubuntu, Debian, Arch, SUSE), macOS and Windows 10. Supports pen input from devices such as Wacom Tablets.
Role in this project:
Back-end Developer
Contributions:115 commits, 12 PRs, 109 comments in 10 months
Contributions summary:Marek primarily contributed to the backend aspects of the Xournal++ project. Their work involved the removal and replacement of the legacy String class with ICU's UnicodeString, accompanied by a compatibility layer, indicating a focus on string handling and potentially internationalization. Further contributions included refactoring the CrashHandler, replacing legacy C++ features, and modifications to file paths within the ExportJob and PythonRunner, suggesting a familiarity with core functionalities and system interactions. The user also made updates regarding boost library and removed some unused headers.
Contributions:1 review, 8 commits, 2 PRs in 2 months
Contributions summary:Marek contributed to the development of a Scala-based Hardware Description Language (HDL) by modifying code related to Verilog and SystemRDL generation. Their contributions included aligning inout port generation in Verilog, implementing features for SystemRDL, and adding corresponding generators for testing. These changes indicate a focus on expanding the project's capabilities in generating hardware descriptions and register interfaces.
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Marek Pikuła - Embedded Engineer at SENT Technology