Mark Gottscho is a Member of Technical Staff at OpenAI with 13 years of experience bridging hardware and software for large-scale AI systems. He previously led compiler and hardware co‑design at SambaNova—founding and managing an Operators Team and formalizing ISA/assembly for next‑gen RDUs—and spent five years at Google driving TPU architecture, RTL, and verified design libraries used in production at massive scale. Comfortable across Rust, SystemVerilog, Python, and C++, Mark combines deep microarchitectural expertise (memory systems, interconnects, mixed precision kernels) with compiler work (MLIR dialects, PJRT plugins) to deliver full‑stack AI accelerators. He holds a PhD from UCLA and has a track record of building teams, improving engineering processes, and shipping silicon features that accelerate vision and inference workloads. An interesting throughline: he repeatedly marries docs-as-code and formalization practices to improve HW/SW collaboration and developer productivity.
High quality and composable RTL libraries in SystemVerilog
Contributions:540 reviews, 507 PRs, 610 pushes in 6 months
hardwarertlverilog
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Mark Gottscho - Member Of Technical Staff at OpenAI