Summary
Martin Söderén is a Senior FPGA Engineer with 11 years of experience designing high-performance firmware and parallel software for mission-critical systems, currently applying that expertise to secure payment and fraud-detection solutions at Mastercard. He holds an M.Sc. in Computer Science and Engineering and advanced VHDL certifications, and spent seven years at CERN developing and operating FPGA-based acquisition and RF feedback systems for accelerators including the LHC. Equally comfortable from low-level hardware to user-facing software, he combines strong C++, Python, and VHDL skills with Linux systems and parallel programming techniques. Notably, he contributed to detection and mitigation of transverse instabilities in the LHC and co-authored publications on the topic, reflecting a rare blend of research-grade problem solving and production engineering. Fluent in Swedish, English, and German, he thrives in collaborative, interdisciplinary environments that demand both precision and creativity.
11 years of coding experience
8 years of employment as a software developer
M.Sc in Computer Science and Engineering, M.Sc in Computer Science and Engineering at Tekniska högskolan vid Linköpings universitet
KTH Royal Institute of Technology
Thematic CERN school of Computing, Thematic CERN school of Computing at CERN
Comprehensive VHDL for FPGA Design, Comprehensive VHDL for FPGA Design at Doulos
Introduction to Accelerator Physics, Introduction to Accelerator Physics at CERN Accelerator School
Swedish, English, German, French