Matt Blanton is a Principal FPGA Engineer with over a decade of hands-on experience designing high-speed mixed-signal front ends and system-level FPGA architectures for JESD204-enabled ADCs/DACs. At Analog Devices he leads FPGA development for multi-SLR Xilinx UltraScale+ designs, owning RTL architecture, embedded software integration, and memory interfaces including DDR, HMC, and HBM. He combines deep RTL skills (SystemVerilog/Verilog) with tooling and flow improvements—creating automated JESD204 transport generators and a Make-based build flow that accelerated developer productivity and customer adoption. Comfortable bridging product requirements and implementation, Matt has a track record of bringing complex FPGA features from spec through silicon bring-up and debug. Based in Greensboro, NC, he pairs an MS in Computer Engineering with pragmatic system-level thinking that favors reuse, extensibility, and measurable schedule impact.
Contributions:1 PR, 8 pushes, 1 branch in 4 years 1 month
fpgaasicjesd204bhdlvhdl
Find and Hire Top DevelopersWe’ve analyzed the programming source code of over 60 million software developers on GitHub and scored them by 50,000 skills. Sign-up on Prog,AI to search for software developers.
Request Free Trial
Matt Blanton - Principal Engineer, FPGA Development at Analog Devices