Matt Reid is an ASIC digital design engineer specializing in security IP hardware verification, currently on the SG Crypto HW team at Synopsys in Ottawa. With seven years of hands-on experience across ASIC RTL design, SystemVerilog/UVM verification and crypto-focused tooling, he moved from an intern who designed and documented a crypto core to a senior engineer driving secure silicon verification. His background combines applied software skills—Docker, Python automation, React—and formal engineering training, graduating top of his class in Computer Systems Engineering from Carleton. Comfortable bridging firmware, hardware and tooling, he’s known for turning spec documents into verifiable RTL and for creating practical automation and monitoring solutions that accelerate crypto testing.
7 years of coding experience
2 years of employment as a software developer
Bachelor of Engineering - BE, Computer Systems (Co-Op Option), 11.9/12, Bachelor of Engineering - BE, Computer Systems (Co-Op Option), 11.9/12 at Carleton University
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Matt Reid - ASIC Digital Design, Sr Engineer at Synopsys Inc