Matteo A
Principal Architect at Arm
Cambridge, England, United Kingdom
Summary
👤
Senior🎓
Top SchoolMatteo A is a Principal MPAM Architect at Arm with over a decade of experience designing memory-system QoS, real-time and performance architectures for mobile and embedded platforms. He leads MPAM strategy and implementation, blending hands-on simulator work (notably contributions to the widely used gem5 architecture simulator around tracing, memory controllers and QoS) with research partnerships and academic lecturing. His background spans deep systems engineering roles at Arm and NVIDIA and a PhD in Computer Engineering from Università di Pisa, giving him both theoretical rigor and production-grade delivery. Known for resolving complex compiler and tracing compatibility issues, he translates low-level hardware/software trade-offs into scalable system features that meet business and real-time constraints.
10 years of coding experience
14 years of employment as a software developer
Doctor of Philosophy - PhD Computer Engineering, Doctor of Philosophy - PhD Computer Engineering at Università di Pisa
Italian, English
Github Skills (12)
simulations10
simulation10
memory-management10
c-language10
architectures10
cprogramming-language10
architecture10
qos9
arm8
x86-647
x867
risc-v7
Programming languages (5)
Github contributions (5)
gem5/gem5
Feb 2016 - Jul 2019
The official repository for the gem5 computer-system architecture simulator.
Role in this project:
Back-end Developer
Back-end DeveloperContributions:12 commits in 3 years 5 months
Contributions summary:Matteo primarily focused on fixing and improving the gem5 architecture simulator, specifically related to tracing and memory controller aspects. Their contributions include resolving a bug in the TraceGen tool, addressing Clang compilation issues, and adding QoS (Quality of Service) features to memory controllers. These enhancements involved modifying code related to tracing, memory management, and system architecture, indicating a focus on core simulator functionality and performance. The user also made adjustments to ensure the simulator's compatibility with different compilers and platforms.
gem5architecturearmmodelingrisc-v
ARM-software/ATP-Engine
May 2020 - Aug 2020
Contributions:6 reviews, 5 commits, 3 PRs in 2 months
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