Matteo Vit

Director Principal Design Engineer at Starware Design Limited

Cambridge, England, United Kingdom
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Summary

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Senior
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Top School
Matteo Vit is a Director and Principal Design Engineer with two decades of multidisciplinary experience spanning ASIC/FPGA design, embedded Linux/Zephyr, hardware layout, and AI/ML accelerators. As founder of Starware Design he advises and delivers end-to-end solutions—from high-speed PCIe/DDR hardware and mixed-signal boards to RTL AI architectures and CI-driven FPGA tooling—combining hands-on engineering with technical leadership. He has driven technology adoption and process change across startups and multinationals, co-authoring multiple patents and winning hackathons along the way. Comfortable as both architect and implementer, he also builds test systems and device drivers, and brings uncommon depth in integrating FPGA devops and QEMU-based co-simulation into product workflows. Based in Cambridge, he is a member of the IoT Security Foundation and consistently bridges hardware, firmware, and software to accelerate complex, multidisciplinary projects.
code10 years of coding experience
job10 years of employment as a software developer
bookI.T.I. "A. Malignani" - Cervignano del Friuli (UD)
bookMaster of Science (MSc), Electronic Engineering, Master of Science (MSc), Electronic Engineering at Università degli Studi di Trieste
languagesEnglish, Italian, German
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Github Skills (13)

python8
numpy6
scientific-computing6
hardware6
risc-v4
asic3
fpga3
vhdl3
32-bit3
dockerfile2
vivado2
linux1
buildroot1

Programming languages (4)

SystemVerilogVHDLCPython

Github contributions (5)

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Contributions:87 commits, 69 pushes, 3 branches in 4 months
starwaredesign/ip_repo

Apr 2019 - Apr 2025

Contributions:15 pushes, 1 branch in 6 years 1 month
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