Matthew Poremba is a computer architecture researcher and Member of Technical Staff at AMD Research with 13 years of experience designing microarchitecture and memory systems for high-performance processors, including work that contributed to the procurement of the Frontier Exascale supercomputer. He holds a Ph.D. in Computer Engineering from Penn State and has deep expertise in memory hierarchy, network-on-chip, 3D/2.5D integration, and byte-addressable non-volatile memories. Matthew has built and maintained architectural simulators (NVMain) and contributed backend changes to the widely used gem5 simulator, demonstrating strong practical and tool-level understanding of system-level modeling. His work spans academic rigor and applied engineering—from taped-out 3D ICs and circuit-level models to synthetic memory traffic models for Exascale APUs—while he balances serious research with a life that swaps snowboards for code seasonally.
The official repository for the gem5 computer-system architecture simulator.
Role in this project:
Back-end Developer
Contributions:254 reviews, 229 commits, 144 PRs in 6 years 9 months
Contributions summary:Matthew's contributions focused on modifying existing Ruby code within the gem5 computer-system architecture simulator, particularly related to the gem5/gem5 repository. They refactored code, implemented features, and fixed bugs. Their work involved modifying core data structures and control logic for the simulator. This suggests a strong understanding of the simulator's internal workings and the underlying system architecture being modeled.
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Matthew Poremba - Member Of Technical Staff at AMD