Wissenschaftlicher Mitarbeiterin In Forschung Und Lehre at ISW Universität Stuttgart
Stuttgart, Baden-Württemberg, Germany
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Matthias Strljic is a research-focused software engineer with 11 years of experience, currently working as a wissenschaftlicher Mitarbeiter in Forschung und Lehre at Universität Stuttgart. He holds an M.Sc. in Software Engineering from Universität Stuttgart and applies academic rigor to industrial IoT challenges, particularly in back-end systems and OPC UA integration. As a contributor to the well-known Apache PLC4X project, he fixed type-handling bugs, enhanced OPC UA driver robustness, and implemented variable request timeouts—practical improvements that reduce runtime failures in industrial protocols. Colleagues describe him as detail-oriented and pragmatic, bridging research and production by turning protocol edge cases into maintainable code. Based in Stuttgart, he combines long-term institutional knowledge with active open-source engagement to deliver resilient middleware for automation systems.
11 years of coding experience
Master of Science - MS, Software Engineering, Master of Science - MS, Software Engineering at Universität Stuttgart
Contributions:3 reviews, 47 commits, 21 PRs in 2 years 4 months
Contributions summary:Matthias primarily addressed issues related to the `DefaultPlcWriteRequest` class, correcting the handling of data types like `Byte[]` and `byte[]`. They also focused on improving the OPC UA driver, fixing JavaDoc formatting and adding warning messages at exception points. Furthermore, the user implemented the request timeout field for variable timeouts within the OPC UA connection. They also added the initial OPC UA project with the first Milo ExampleServer.
Contributions:10 pushes, 1 branch in 4 years 2 months
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Matthias Strljic - Wissenschaftlicher Mitarbeiterin In Forschung Und Lehre at ISW Universität Stuttgart