Meet Patel is a Senior Lead Engineer based in Bengaluru with 9 years of experience building and optimizing AI and deep learning systems for edge and accelerator hardware. He has a strong track record in model conversion and graph-level optimizations—enabling TensorFlow and ONNX models to run efficiently on custom AI chips—and has led R&D efforts at both PathPartner and Qualcomm. His hands-on work includes building low-latency production models (e.g., license plate recognition without RNNs), inference SDKs using TensorRT, and tooling that patches TensorArray/loop patterns for accelerators. Mentoring, internal technical evangelism, and hiring have complemented his engineering focus, and his academic background (MTech in Software Systems with Data Analytics from BITS Pilani) and deep learning nanodegree reflect a solid mix of theory and applied ML. An often-overlooked strength is his experience bridging mechanical engineering foundations with software-driven embedded inference, giving him practical insight into deployment constraints on real-world devices.
9 years of coding experience
9 years of employment as a software developer
BITS Pilani, Birla Institute of Technology and Science
Online Degree Tensorflow in Practice Module-4 Sequences, Time Series and Prediction, Online Degree Tensorflow in Practice Module-4 Sequences, Time Series and Prediction at Coursera
Nanodegree Deep Learning, Nanodegree Deep Learning at Udacity
Bachelor of Engineering (B.E.) Mechanical Engineering, Bachelor of Engineering (B.E.) Mechanical Engineering at Faculty of Technology and Engineering, MSU
Bachelor of Engineering, Bachelor of Engineering at The Maharaja Sayajirao University of Baroda
Online Course Programming in C and C++, Online Course Programming in C and C++ at Internshala
HSC, HSC at Parth School of Science and Competition
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