Summary
Michael Cade is a Verification Engineer with 10 years of experience specializing in multi-core Power architecture verification, having driven fabric and link-layer verification across POWER8–POWER11 at IBM and earlier CoreNet QoS verification at Freescale. His MS thesis focused on performance optimizations for multi-core systems, and he thrives at the intersection of hardware architecture and software engineering, building drivers, monitors, and verification IP to emulate and validate complex units. Known for owning transaction-layer monitors and checkers, he brings deep practical expertise in arbitration, coherency, and data-link protocols for high-performance fabrics. Based in San Marcos, TX, he pairs rigorous academic grounding with a background in graphics and tooling, reflecting a pragmatic, multidisciplinary approach to solving verification challenges.
10 years of coding experience
7 years of employment as a software developer
MS, Computer Science, MS, Computer Science at Texas State University
BFA, Graphic Design, BFA, Graphic Design at Kansas State University