Michael Canesche
Lead Software Engineer at Compilers Lab
Minas Gerais, Brazil
Summary
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Senior🎓
Top SchoolMichael Canesche is a Lead Software Engineer and Ph.D. in Computer Science from UFMG with 11 years of experience building high-performance software and hardware-aware systems. He specializes in compiler and kernel optimizations for heterogeneous parallel architectures, having developed algorithms targeting GPUs, FPGAs, CGRAs and worked with LLVM and TVM. At Cadence he progressed from AI Compiler Intern to lead engineer, while maintaining active graduate research in compiler search and program transformations. Fluent in C/C++, Python, CUDA/OpenMP and hardware description languages, he blends deep academic rigor (9.1/10 PhD standing) with production-grade engineering. Outside work he fuels creativity with coffee and hands-on coding, and publishes source work openly on GitHub and Google Scholar, bridging research and applied tooling.
11 years of coding experience
2 years of employment as a software developer
Mestrado em Ciências da Computação, Arquitetura de Computadores, Mestrado em Ciências da Computação, Arquitetura de Computadores at Universidade Federal de ViçosaDoctor of Philosophy - PhD, Computer Science, 9.1/10, Doctor of Philosophy - PhD, Computer Science, 9.1/10 at Universidade Federal de Minas Gerais
Stackoverflow
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Github Skills (32)
spirv10
opencl10
tvm10
vulkan10
javascript10
cpu10
gpu-programming10
machine-learning10
metal10
deep-learning10
gpu10
compiler10
tensor9
gpu-acceleration9
reinforcement-learning-environments8
Programming languages (5)
Github contributions (5)
cacauvicosa/mips
Jan 2020 - Apr 2021
Exemplos de Implementações em Verilog para MIPS
Contributions:78 commits, 74 pushes in 1 year 3 months
mipsexemplosverilog
lac-dcc/bennu
Aug 2023 - Jun 2024
template_autotvm
Contributions:2 PRs, 269 pushes, 2 branches in 9 months
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