Michael Lemay
Principal Engineer at Intel Corporation
Hillsboro, Oregon, United States
Summary
👤
Senior🎓
Top SchoolMichael Lemay is a Principal Engineer specializing in memory management and hardware-assisted security with over a decade of experience designing and shipping processor and software defenses such as CET, VT-rp, and Chrome’s MiraclePtr support. Based in Hillsboro, Oregon, he architects the ChkTag x86 memory safety feature at Intel and contributes to standards work in ISO C++ WG21 and the x86 Ecosystem Advisory Group. His research at Intel Labs has driven real-world deployments—from DARPA-funded cryptographic capability work to LLVM-based stack shielding—and he has a strong pedigree in low-level systems and embedded IoT work, including porting Contiki OS to the Intel Quark X1000. Known for bridging deep research and production engineering, he combines a PhD/postdoc background from UIUC with practical device-driver and isolation expertise that accelerates adoption of new security primitives.
11 years of coding experience
13 years of employment as a software developer
MS PhD and Postdoc Computer Science, MS PhD and Postdoc Computer Science at University of Illinois Urbana-ChampaignBS Computer Science, BS Computer Science at University of Wisconsin-Eau Claire
English
Github Skills (12)
embedded10
pci10
c-programming10
device-driver10
sys10
gpio9
ethernet8
i2c8
uart8
assembler7
x867
assembly7
Programming languages (8)
Github contributions (5)
contiki-os/contiki
Jul 2015 - Oct 2016
The official git repository for Contiki, the open source OS for the Internet of Things
Role in this project:
Embedded Systems Engineer / IoT Developer
Embedded Systems Engineer / IoT DeveloperContributions:55 commits, 16 PRs, 27 comments in 1 year 3 months
Contributions summary:Michael primarily contributed to the development of the Intel Contiki OS port for the Intel Quark X1000 platform. They focused on adding and enhancing device drivers, specifically for the Intel Quark X1000 built-in Ethernet interface, the MMIO-accessible 16X50 UART, and access to the Isolated Memory Regions (IMRs). Furthermore, they made several updates and refactorings to existing PCI and GPIO drivers, including improvements for shared ISRs, indicating a strong understanding of hardware interaction and low-level system programming.
contikiinternet-of-things
IntelLabs/chromium-mem-safety
Mar 2021 - Oct 2023
Contributions:2 PRs, 7 pushes, 1 branch in 2 years 7 months
Find and Hire Top DevelopersWe’ve analyzed the programming source code of over 60 million software developers on GitHub and scored them by 50,000 skills. Sign-up on Prog,AI to search for software developers.