Michael 叶明凯
Lisle, Illinois, United States
Summary
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Rockstar🎓
Top SchoolMichael 叶明凯 is a chip-focused SoC architect with four years of hands-on experience blending computer engineering fundamentals from UIUC with ongoing graduate work in Hangzhou. He specializes in chip architecture and verification-driven development, aiming to streamline chip flows and improve quality while reducing engineer friction. At Sage Micro he contributed to SoC design and at-scale documentation, and he’s an active technical writer for the prominent Chipyard RISC-V framework—clarifying boot and CI workflows for FPGA prototyping. His background also includes large-scale editorial leadership producing hundreds of vetted STEM questions, reflecting strong attention to detail and rigorous QA practices. Based in Lisle, IL, he pairs systems-level hardware insight with a practical drive to make verification tooling and processes more efficient.
4 years of coding experience
4 years of employment as a software developer
Bachelor of Science - BS, Computer Engineering, Bioengineering, Bachelor of Science - BS, Computer Engineering, Bioengineering at University of Illinois Urbana-ChampaignIllinois Mathematics and Science Academy
Github Skills (5)
documentation10
technical-writing10
chisel9
risc-v9
accelerator7
Programming languages (11)
Github contributions (5)
ucb-bar/chipyard
Aug 2021 - Aug 2022
An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
Role in this project:
Technical Writer
Technical WriterContributions:1 review, 6 commits, 2 PRs in 1 year
Contributions summary:Michael primarily contributed to the repository's documentation, specifically regarding the VCU118 prototyping platform. Their work focused on clarifying and correcting the instructions for SD card partitioning and Linux booting procedures. Additionally, the user corrected documentation errors within the TileLink-Diplomacy-Reference, ensuring the accuracy of argument descriptions. A commit was also made to update the CI check script.
rtlout-of-orderhardware-designsvlsicomputer-engineering
michael-etzkorn/scripts
Aug 2021 - Jun 2022
RTL related scripts to ASIC/FPGA
Contributions:3 PRs, 33 pushes, 4 branches in 10 months
rtlasicvivadovhdllattice
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