Mike Gunter
Founder And CTO at MatX
San Francisco, California, United States
Summary
🤩
Rockstar🎓
Top SchoolMike Gunter is a founder and CTO in San Francisco with over two decades of engineering leadership and six years focused on ML, hardware acceleration, and systems engineering. He founded MatX to build faster chips for LLMs after leading multiple high-impact hardware-acceleration and large-scale ML projects at Google and X, where his designs delivered 10x cost/performance improvements and powered pipelines processing hundreds of billions of examples. Comfortable spanning chip microarchitecture to compiler and kernel work, he contributes to notable open-source projects like LiteX and Google’s CFU-Playground, implementing custom function units that accelerate TensorFlow Lite for Microcontrollers. His career blends invention (from wireless and graphics ASICs to novel microcoded evaluators) with hands-on implementation, hiring and managing engineering teams to productionize research. Notably, he has deep FPGA and bitstream expertise (prjxray/Xilinx 7-series) and a history of shipping both silicon and large distributed ML systems. He pairs startup grit with the execution discipline of a seasoned Google architect, solving cross-layer performance challenges end-to-end.
6 years of coding experience
25 years of employment as a software developer
University of California, Berkeley
Github Skills (20)
xilinx10
python10
risc-v10
tflm10
tensorflow-lite10
bitstream10
sys10
toolchain10
fpga10
embedded10
vivado10
tix10
verilog9
c119
machine-learning9
Programming languages (18)
Github contributions (5)
google/CFU-Playground
Oct 2020 - Jan 2023
Want a faster ML processor? Do it yourself! -- A framework for playing with custom opcodes to accelerate TensorFlow Lite for Microcontrollers (TFLM). . . . . . Online tutorial: https://google.github.io/CFU-Playground/ For reference docs, see the link below.
Role in this project:
ML Engineer
ML EngineerContributions:392 reviews, 820 commits, 435 PRs in 2 years 2 months
Contributions summary:Mike primarily contributed to the development and testing of a custom function unit (CFU) for accelerating TensorFlow Lite for Microcontrollers (TFLM). Their commits include implementing software versions of the CFU and creating a test suite, with the goal of supporting and testing several operations (e.g. byte sum, byte swap, and bit reverse, or more complex math). The user also added a direct connection between the CFU and LRAM, with the creation of a full functional example, and enhanced the code to work with HPS boards, and integrate with the projects test routines. The user's work indicates a focus on the intersection of software and hardware in the context of machine learning acceleration.
machine-learningtflmfasteronline-tutorialtensorflow-lite
f4pga/prjxray
Apr 2020 - Nov 2020
Documenting the Xilinx 7-series bit-stream format.
Role in this project:Embedded Systems Engineer
Embedded Systems EngineerContributions:10 reviews, 13 commits, 6 PRs in 7 months
Contributions summary:Mike primarily contributed to device-specific configuration and documentation for the prjxray project, focusing on Xilinx 7-series FPGAs. Their work included creating and modifying settings files for various Artix-7 parts, particularly the xc7a100t. They also added documentation related to the process of adding new devices to the project. The user's contributions revolved around understanding and adapting the bitstream format for different Xilinx devices.
vivadoartix7xilinxsymbiflowxilinx-fpga
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