Mike Urbach
Principal Engineer at SiFive
Denver, Colorado, United States
Summary
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Rockstar🎓
Top SchoolMike Urbach is a Principal Engineer based in Denver with 11 years of experience building and hardening compiler and hardware-oriented tooling. He has progressed through senior engineering roles at SiFive where he now leads technical efforts, and previously founded a small engineering consultancy, demonstrating both leadership and entrepreneurial initiative. His open-source work includes substantive backend and test-automation contributions to high-profile projects like Chisel (a modern hardware design language) and CIRCT/LLVM, focusing on compiler backends, pipeline lowering, and reliability improvements. Mike blends low-level systems expertise with practical test engineering, routinely adding tests, refining error handling, and improving developer ergonomics. Colleagues describe him as a hands-on problem solver who moves between strategic architecture and detailed code fixes with equal fluency. He holds a B.E. in Computer Engineering from Dartmouth and brings a hardware-software perspective that helps bridge silicon design and compiler implementation.
11 years of coding experience
9 years of employment as a software developer
Bachelor of Engineering (B.E.) Computer Engineering, Bachelor of Engineering (B.E.) Computer Engineering at Dartmouth College
Stackoverflow
11reputation
2kreached
1answer
0questions
Github Skills (11)
rt10
chisel10
c-language10
firrtl10
cprogramming-language10
mlr10
compiler-development10
scala10
verilog9
testing9
unit-testing6
Programming languages (18)
Github contributions (5)
llvm/circt
Sep 2020 - Jan 2023
Circuit IR Compilers and Tools
Role in this project:
Backend Developer
Backend DeveloperContributions:19 releases, 1896 reviews, 371 commits in 2 years 4 months
Contributions summary:Mike's contributions primarily involve making changes to the CIRCT project's infrastructure, including support for a new `PipelineWhileOp` operation, as well as adding and enhancing passes for compiling and converting code. Their commits demonstrate a focus on refining the compiler's backend, specifically the lowering of Affine loops to pipelines and creating test cases to validate the changes. The user also worked on fixing bugs, enhancing analysis tools, and refactoring parts of the code.
compilercirctllvmmlir
chipsalliance/chisel
Jan 2023 - Jan 2023
Chisel: A Modern Hardware Design Language
Role in this project:Backend Developer & Test Automation Engineer
Backend Developer & Test Automation EngineerContributions:145 reviews, 1 commit, 67 PRs in 1 day
Contributions summary:Mike's contributions primarily focused on improving the Chisel hardware design language. They addressed issues by modifying the core Chisel codebase, including adding error messages, modifying connection behaviors, and updating internal types. Furthermore, the user contributed to the test suite, adding tests and verifying functionality. These contributions demonstrate a focus on improving the usability and reliability of the Chisel language.
chiselhardware-designschisel3scalafirrtl
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