Mikhail Asiatici
Senior Member Of Technical Staff at AMD
Cambridge, England, United Kingdom
Summary
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Senior🎓
Top SchoolMikhail Asiatici is a Senior Member of Technical Staff and computer architect with a Ph.D. in Computer Science and about a decade of hands-on experience in digital hardware design and computer architecture. He has transitioned from academic research at EPFL—publishing in top FPGA and architecture venues—to impactful roles at Xilinx and AMD, where he advances processor and FPGA architectures. Comfortable bridging deep research and product-grade engineering, he brings practical expertise in prototyping, low-level design, and system evaluation gained through internships at Microsoft, CERN and other labs. Based in Cambridge, he combines rigorous academic pedigree with industry delivery, and is known for turning novel FPGA/architecture ideas into tangible silicon- and system-level advances.
9 years of coding experience
4 years of employment as a software developer
High school degree Electronic and Telecommunication Engineering, High school degree Electronic and Telecommunication Engineering at ISITIP VerrèsMaster's degree (semester 3/3) Nanotechnologies for ICT, Master's degree (semester 3/3) Nanotechnologies for ICT at EPFLMaster's degree (semester 2/3) Nanotechnologies for ICT, Master's degree (semester 2/3) Nanotechnologies for ICT at Grenoble INP - UGAMaster's degree (semester 1/3) Nanotechnologies for ICT, Master's degree (semester 1/3) Nanotechnologies for ICT at Politecnico di Torino
Italian, French, English
Github Skills (9)
trend8
scala5
chisel5
rocket4
rocket-chip3
miner2
low-level2
cuda1
gpu1
Programming languages (2)
Github contributions (5)
m-asiatici/MSHR-rich
Dec 2018 - Dec 2020
Contributions:6 commits, 9 pushes, 1 branch in 2 years
m-asiatici/ntds-2019-team-49-fpga
Jan 2020 - Jan 2020
Contributions:1 commit, 3 pushes, 1 branch in 1 day
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