Milan Kubavat
Design Verification Engineer
Bengaluru, Karnataka, India
Summary
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Senior🎓
Top SchoolMilan Kubavat is a Design Verification Engineer with eight years of experience specializing in SystemVerilog, UVM, and assertion-based verification for ASICs. He has developed VIPs for APB, AHB, AXI and MIPI CSI-2, and has practical emulation experience with Palladium Z1 and Protium S1. Milan combines strong digital design understanding and peripheral protocol knowledge (I2C, SPI) with hands-on scripting in Perl, Python and shell to accelerate testbench automation and debug. He has worked across major semiconductor teams at Google, Qualcomm and Samsung, delivering robust constraint-random and coverage-driven verification environments. Comfortable with vplan development, functional coverage analysis and code coverage closure, he bridges verification methodology and pragmatic silicon-focused validation. An early-career background outside engineering in production operations gives him a practical, process-oriented perspective on delivering reliable silicon.
8 years of coding experience
7 years of employment as a software developer
Bachelor of Engineering (B.E.) Instrumentation & Control Engineering, Bachelor of Engineering (B.E.) Instrumentation & Control Engineering at L.D. College of EngineeringGithub contributions (2)
MilanKubavat/UVM
Sep 2017 - May 2020
Contributions:13 commits, 12 pushes, 1 branch in 2 years 8 months
MilanKubavat/TestbenchGenerator
Oct 2017 - Oct 2017
Contributions:1 commit, 1 push, 1 branch in 1 day
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