Miloš Poletanović
Compiler Engineer at HTEC
Novi Sad, Vojvodina, Serbia
Summary
👤
Senior🎓
Top SchoolMiloš Poletanović is a compiler engineer with 12 years of experience specializing in compiler-level transformations and optimizations of pre-trained neural networks for deployment on heterogeneous ML accelerators. He implements and tunes low-level ML operators, performs graph lowering, operator fusion, memory planning, and latency-aware scheduling to squeeze maximum performance from specialized hardware. His background includes LLVM optimization work and a practical internship building a LuaJIT disassembler for RISC-V, reflecting deep familiarity with both compiler infrastructure and emerging architectures. Currently at HTEC, he drives end-to-end model optimization pipelines—static analysis, pattern-based graph rewrites, precision calibration, and backend IR generation—bringing research-grade techniques to production targets. Academically strong with top grades from the University of Novi Sad and cross-border study in Palermo, he combines rigorous theory with hands-on systems engineering.
12 years of coding experience
4 years of employment as a software developer
Master's degree, Computer Software Engineering, 10.00 (5 to 10 scale), Master's degree, Computer Software Engineering, 10.00 (5 to 10 scale) at Faculty of Technical Sciences, University of Novi SadGymnasium "Jovan Jovanovic Zmaj", Novi SadBachelor of Engineering - BE, Computer Engineering, Bachelor of Engineering - BE, Computer Engineering at Università degli Studi di Palermo
English, Serbian, Italian
Github Skills (2)
android2
dvb1
Github contributions (4)
iWedia/repo
Dec 2015 - Dec 2015
Contributions:4 pushes, 1 branch in 4 days
iWedia/iWediaSimpleTvInputService
Dec 2015 - Dec 2015
Contributions:1 push, 1 branch in 1 day
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