Min Si is a research scientist with 13 years of experience specializing in scale-out challenges for AI workloads and high-performance computing runtimes. Currently in Facebook AI’s System SW/HW Co-design group, he bridges systems engineering and research to optimize distributed communication and runtime behavior for large-scale ML. His background includes applied research at Argonne National Laboratory and a Ph.D. from The University of Tokyo, grounding his work in parallel programming models and communication runtimes. An active contributor to major open-source projects like PyTorch and MPICH, he has improved distributed communication backends and added rigorous RMA tests, demonstrating a knack for both low-level performance fixes and robust validation. Based in Belmont, California, he combines deep academic training with hands-on systems engineering to tackle practical bottlenecks in production AI infrastructure.
Contributions:288 reviews, 891 commits, 182 PRs in 5 years
Contributions summary:Min contributed to the MPICH repository by implementing new tests related to RMA (Remote Memory Access) operations and functionalities. The commits focus on testing and validating different aspects of RMA, including checking remote completion, verifying the correct handling of operations over overlapping windows, and ensuring functionality for dynamic windows and thread usage. The contributions demonstrate the user's involvement in enhancing and testing the RMA features of the MPICH library.
Tensors and Dynamic neural networks in Python with strong GPU acceleration
Role in this project:
Back-end Developer & Systems Engineer
Contributions:8 reviews, 16 commits, 14 PRs in 6 months
Contributions summary:Min primarily focused on improving the performance and efficiency of the PyTorch distributed communication backend. They addressed issues related to tensor size checking in reduce_scatter and allgather operations, opting to use size() instead of numel() for more robust behavior. They also refactored header paths within the distributed module, transitioning to absolute paths for improved build compatibility. Furthermore, the user added and refined the NCCL initialization logging and implemented a trace tracker callback mechanism within the CUDA caching allocator to facilitate NCCL segment registration.
pythongpu-accelerationdeep-learninggpunumpy
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