Summary
Mingxiang Li is a System-on-Chip design engineer with eight years of hands-on experience in FPGA and digital IP development, currently working on HBM subsystem and FlexNoC for a cloud TPU/AI chip in Beijing. He has designed high-performance communication and system-management IPs for GPU cluster and HPC switch silicon, and led SoC bus architecture revisions leveraging AXI/AHB/APB optimizations. Prior roles include SerDes and high-speed ADC FPGA applications at Analog Devices, where he merged embedded FPGA work with IO digital-logic modeling and verification on Zynq MPSoC platforms. A Beihang University alumnus (BE, MEng), he blends academic training with practical chip-level integration and a penchant for making complex protocol bridges (e.g., SPI2AHB, MMU-lite) easy to use for system integrators.
8 years of coding experience
3 years of employment as a software developer
Master of Engineering - MEng Instrumentation Technology/Technician, Master of Engineering - MEng Instrumentation Technology/Technician at Beihang University