Mohammad Hizzani is a PhD researcher and electrical engineer with eight years of experience at the intersection of VLSI digital arithmetic, cryptography, and neuromorphic computation. He designs and prototypes hardware-software solutions for neuromorphic combinatorial optimization—applying Hopfield networks, SNNs, GNNs and cross-bar/mixed analog-digital backbones to problems like 3-SAT and QAP at Forschungszentrum Jülich. His background includes hardware accelerators for DNNs, Synopsys-driven ASIC/FPGA RTL implementation, and practical data-science work with MIT ReACT partners, reflecting a rare blend of circuit-level rigor and applied machine learning. He has taught and developed tutorials for digital design environments and supervised engineering labs, demonstrating clear communication of complex tools to students and peers. Based in Germany, he pairs top academic training (RWTH Aachen, MIT ReACT, MS with top grades) with hands-on system integration experience. An uncommon strength is his ability to translate algorithmic neural models into constrained analog-digital hardware architectures for real-world optimization tasks.
8 years of coding experience
5 years of employment as a software developer
Doctor of Engineering, Electrical Engineering, Doctor of Engineering, Electrical Engineering at RWTH Aachen University
Master of Science - MS, Electrical Engineering, 92.6%, Master of Science - MS, Electrical Engineering, 92.6% at Princess Sumaya University for Technology
97.4%, Science Branch, 97.4%, Science Branch at Comprehensive Secondary School (National High School Examination)
MIT ReACT, Computer and Data Science, MIT ReACT, Computer and Data Science at Massachusetts Institute of Technology
Bachelor of Science - BS, Electrical Engineering, 91.7%, Bachelor of Science - BS, Electrical Engineering, 91.7% at Philadelphia University
Contributions:33 commits, 13 pushes, 1 branch in 6 months
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Mohammad Hizzani - PhD Researcher at Forschungszentrum Jülich