Summary
Muya Chang is an ASIC VLSI research scientist at NVIDIA with 11 years of experience bridging academic rigor and production silicon, holding a Ph.D. in ECE from Georgia Tech and an M.S. in Computer Science. He has driven multiple end-to-end chip tape-outs and is fluent across the full ASIC flow—RTL design, verification, synthesis, place & route, and physical verification—while also coding in C/C++/Python and accelerating workloads with CUDA and OpenCL. His background spans GPU architecture, parallel programming, and near-memory compute research (Qualcomm), reflecting a focus on reducing data movement for ML accelerators. A seasoned researcher and educator, he has taught advanced VLSI labs and earned teaching awards, and he maintains active collaborations with academia (Notre Dame, Georgia Tech). Based in Redmond, he combines hands-on circuit and system-level insight to translate architectural ideas into silicon-ready implementations.
11 years of coding experience
4 years of employment as a software developer
Bachelor of Science, Electronics Engineering, 3.9/4.0, Bachelor of Science, Electronics Engineering, 3.9/4.0 at National Chiao Tung University
Master of Science - MS, Computer Science, 3.90/4.00, Master of Science - MS, Computer Science, 3.90/4.00 at Georgia Institute of Technology
University of Illinois Urbana-Champaign
日語, English, Chinese