Myeongcheol Shin is a Principal Engineer with over 20 years of hands-on experience architecting and delivering wireless PHY silicon, currently leading FEC decoder design for Wi‑Fi 6/7/8 at NXP. He owns the complete algorithm-to-silicon path—MATLAB modeling, fixed-point C++ refinement, micro-architecture, SystemVerilog RTL, and bit‑true verification—and has driven sign-off across DV, physical design, firmware, and post‑silicon teams. His deep FEC expertise produced measurable wins: scalable multi-segment LDPC for Wi‑Fi 7 MLO, 25–40% LDPC throughput gains via memory-access reordering, and a 50% LDPC area reduction for cost-sensitive IP. Prior to NXP he spent 18 years at Samsung shipping decoders and demodulators in Galaxy phones and TVs, and even led the IEEE 802.15.4z UWB modem spec from scratch. He holds a Ph.D. from KAIST, four U.S. patents, and a track record of rapid innovation—e.g., delivering a Beidou 64-ary LDPC decoder in one month—that makes him a force multiplier for wireless PHY teams.
11 years of coding experience
8 years of employment as a software developer
Seoul science high school
Ph.D Electrical Engineering, Ph.D Electrical Engineering at Korea Advanced Institute of Science and Technology
Contributions:33 commits, 14 PRs, 104 pushes in 7 months
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