Nagarjuna Vempati
Senior Principal Firmware Engineer at Astera Labs
San Jose, California, United States
Summary
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Senior🎓
Top SchoolNagarjuna Vempati is a Senior Principal Firmware Engineer with over a decade of hands-on experience building embedded real-time systems, device drivers, and protocol stacks for high-performance storage and networking products. He has led firmware design for enterprise SAS/SATA controllers, PCIe Gen3 switches, and storage virtualization layers—designing read services, RAID recovery, and background task managers to improve I/O predictability and latency. Known for methodical troubleshooting and systems integration, he is a strong C programmer who also applies OO thinking to complex firmware problems. Based in San Jose, he has driven cross-functional features such as mirror support for hot-data duplication and PCIe AER/transaction handling, blending deep protocol knowledge with pragmatic system design. His background spans Cisco, PMC-Sierra/Microsemi, Western Digital/SanDisk, and Astera Labs, reflecting a track record of shipping resilient, high-throughput firmware in data-center and enterprise storage contexts.
10 years of coding experience
15 years of employment as a software developer
MS Computer Engineering, MS Computer Engineering at San José State UniversityB.S Electronics and Instrumentation, B.S Electronics and Instrumentation at Velagapudi Ramakrishna Siddhartha Engineering College (VRSEC)
Stackoverflow
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Github Skills (1)
r-programming1
Github contributions (5)
nvempati/FEND
Feb 2016 - Apr 2016
Contributions:11 commits, 10 pushes, 3 branches in 1 month
nvempati/python-lists-readme-data-science-intro-000
Feb 2020 - Feb 2020
Contributions:79 pushes, 1 branch in 1 day
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