Summary
Nandeeka Nayak is a PhD candidate and graduate student researcher at UC Berkeley with nine years of experience designing compiler and accelerator technologies for tensor algebra and related domains. Her work blends theoretical methods for efficient kernel design with practical implementations, producing compilers, DSLs, and accelerator designs that have driven multi-× speedups and energy reductions (e.g., a 6.7× speedup for attention accelerators) and earned industry funding and awards. She has led large, collaborative open-source efforts—mentoring 27 researchers across 15 institutions to build an accelerator “zoo” and organizing workshops at MICRO—while applying formal verification (Z3) and performance modeling tools (Timeloop, Accelergy) to validate results. Prior industry internships at NVIDIA and Qumulo informed hardware-aware heuristics and systems work, and she has translated novel insights (like recasting RTL simulation as tensor algebra) into competitive tooling. Known for bridging precise DSL-driven descriptions with real-world accelerator evaluation, she combines deep systems intuition with a knack for communicating complex designs to both academia and industry.
9 years of coding experience
10 years of employment as a software developer
Doctor of Philosophy - PhD Computer Science, Doctor of Philosophy - PhD Computer Science at University of California, Berkeley
Bachelor of Science - BS Computer Science, Bachelor of Science - BS Computer Science at Harvey Mudd College
Doctor of Philosophy - PhD Computer Science, Doctor of Philosophy - PhD Computer Science at University of Illinois Urbana-Champaign
High School Diploma, High School Diploma at Henry M Gunn High School
English, Spanish, Korean