Summary
Naqash Naveed is an Electrical and Computer Engineer with 8 years of hands-on experience designing RTL and firmware for FPGA and SoC platforms, specializing in high-speed ADC/DAC chains, JESD204B interfaces, and SDR applications. He has delivered end-to-end solutions from RTL (Verilog/VHDL/SystemVerilog) through driver and host software (C/C++, Python, LabVIEW), and has practical expertise in power-optimized digital design and microcontroller-based control. At Infineon and Signatics he combined rigorous test engineering (Unity, AFL++, Docker, Simulink) with HIL validation and embedded bring-up, improving robustness of power-conversion and radio systems. His background spans RISC-V memory encryption, PSoC-based DAB control, and real-time PL–PS data paths on Xilinx Ultrascale+, reflecting a rare blend of RF/analog sensitivity and digital optimization. Comfortable in Windows and Linux driver stacks and with experience in automated testing and GA test-generation, he thrives on bridging research prototypes to production-ready firmware and hardware. Based in Munich, he brings practical lab skills (oscilloscopes, spectrum analyzers) and a track record of squeezing performance and reliability from complex mixed-signal systems.
8 years of coding experience
4 years of employment as a software developer
MS Communication and Electronics Engineering , MS Communication and Electronics Engineering at Technical University of Munich
Electrical Engineering Electrical Electronics and Communications Engineering, Electrical Engineering Electrical Electronics and Communications Engineering at National University of Sciences and Technology (NUST)
English, Urdu