Summary
Naveen Suda is a software engineer in the San Francisco Bay Area with a deep background in hardware-aware ML and embedded inference, currently building software at Meta after leading neural-network acceleration work at Arm. His prior roles include developing CMSIS-NN for Cortex-M microcontrollers and applying pruning, clustering, and quantization to speed models on Arm NPUs, reflecting a rare combination of systems software and ML model optimization expertise. He holds a Ph.D. in electrical engineering and has researched hardware accelerators, analog prototyping platforms, and ultra low-power regulators, bringing strong research rigor to production problems. Early industry experience in FPGA platforms, high-speed I/O calibration, and server-processor physical design rounds out a career that spans silicon to software. Colleagues would note his knack for turning academic innovations into pragmatic deployment-ready libraries and optimizations.
3 years of coding experience
12 years of employment as a software developer
Master of Technology (M.Tech.), Master of Technology (M.Tech.) at Indian Institute of Technology, Guwahati
Bachelor of Technology (B.Tech.), Electronics and Communications Engineering, Bachelor of Technology (B.Tech.), Electronics and Communications Engineering at National Institute of Technology Warangal
Doctor of Philosophy (Ph.D.), Electrical engineering, Doctor of Philosophy (Ph.D.), Electrical engineering at Arizona State University