Nawrin Sultana

Senior Member Of Technical Staff at AMD

Hillsboro, Oregon, United States
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Summary

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Nawrin Sultana is a Senior Member of Technical Staff and GPU communication libraries engineer with six years of experience building high-performance runtime and parallel programming systems. She holds a PhD in Computer Science from Auburn University, where her research produced a novel checkpoint-based fault tolerance approach for MPI that reduces recovery time in large-scale HPC applications. At Intel she developed runtime libraries for OpenMP and DPC++, and she now focuses on RCCL and GPU communication at AMD in Hillsboro, Oregon. Her work bridges academic research and production-grade engineering across heterogeneous and distributed systems. Colleagues describe her as a pragmatic problem-solver who pairs deep HPC theory with hands-on expertise in performance-sensitive software.
code5 years of coding experience
job12 years of employment as a software developer
bookBachelor of Science (BSc) Computer Science and Engineering, Bachelor of Science (BSc) Computer Science and Engineering at Bangladesh University of Engineering and Technology
bookDoctor of Philosophy - PhD Computer Science, Doctor of Philosophy - PhD Computer Science at Auburn University
languagesEnglish, Bengali
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Github Skills (16)

compiler10
oneapi10
modular10
intel10
clang10
toolchain10
llvm10
staging9
sycl9
ansible-collections6
dispatcher5
bolt4
openmp4
daemon4
hpc3

Programming languages (3)

C++LLVMLogos

Github contributions (5)

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nawrinsu/llvm

Jun 2020 - Sep 2021

Intel staging area for llvm.org contribution. Home for Intel LLVM-based projects.
Contributions:32 pushes, 5 branches in 1 year 3 months
stagingintelllvm
nawrinsu/llvm-project

Jun 2024 - Apr 2025

The LLVM Project is a collection of modular and reusable compiler and toolchain technologies.
Contributions:4 pushes, 3 branches in 9 months
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Nawrin Sultana - Senior Member Of Technical Staff at AMD