Nayiri K
Graduate Student Researcher
Berkeley, California, United States
Summary
🤩
Rockstar🎓
Top SchoolNayiri K is a PhD candidate in EECS at UC Berkeley specializing in VLSI flows, EDA, power estimation, and computer architecture with eight years of hands-on experience across academia and industry. As a Graduate Student Researcher at Berkeley’s SLICE Lab and BWRC she bridges research and practical chip bring-up, having led instructional labs and contributed to course development for chip testing and digital design. Her internships at Apple and AMD focused on CPU power modeling and CAD physical design, complementing earlier work in circuit design and low-power VLSI from HP and UVA. She is an active contributor to the Chipyard ecosystem, improving Sky130 tutorial documentation and making complex open-source SoC flows more accessible. Outside the lab she’s an avid outdoor enthusiast—running, rock climbing, skiing, mountain biking, and backpacking—which she credits for sustaining her problem-solving stamina.
8 years of coding experience
3 years of employment as a software developer
Doctor of Philosophy - PhD Electrical Engineering, Doctor of Philosophy - PhD Electrical Engineering at University of California, BerkeleyWestern Albemarle High SchoolBachelor of Science - BS Computer Engineering Mathematics, Bachelor of Science - BS Computer Engineering Mathematics at University of Virginia
English, Russian, French
Github Skills (4)
documentation10
vlsi10
chisel4
rt4
Programming languages (9)
Github contributions (5)
ucb-bar/chipyard
Feb 2022 - Oct 2022
An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
Role in this project:
Technical Writer
Technical WriterContributions:9 reviews, 77 commits, 10 PRs in 7 months
Contributions summary:Nayiri's commits primarily focus on documenting the Sky130 tutorial within the Chipyard repository. They added and modified documentation files, including a tutorial for using the Hammer physical design flow with the Sky130 process, as well as an overview of the VLSI flow and various aspects of the Chipyard project. The commits include updates to file structures, prerequisites, and build commands within the tutorial. Overall the commits center around improving the available documentation for the project.
agilerisc-vrocket-chipchip-generatorchisel
EECS150/asic_labs_fa21
Aug 2021 - Dec 2021
Contributions:97 commits, 59 pushes in 3 months
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