Nguyen Tuan
STA Technical Manager at MediaTek
Singapore, Singapore
Summary
👤
Senior🎓
Top SchoolNguyen Tuan is an STA Technical Manager at MediaTek with 12 years of hands-on experience in SoC, MCU and FPGA design flows, specializing in static timing analysis, timing closure and design verification. He progressed from senior ASIC design and hardware verification roles to technical management, bringing deep expertise in logic synthesis, constraint development, power estimation and CDC/lint practices. His background includes detailed peripheral verification (SPI, UART, CAN, SENT, memory controllers) and practical tester pattern development, giving him a strong bridge between RTL intent and silicon delivery. Based in Singapore, he combines practical FPGA/Verilog implementation experience from academic projects with production-grade ASIC timing ownership. Known for improving timing constraints and closure processes, he often drives cross-functional fixes that shorten tapeout cycles. He brings a pragmatic, verification-first mindset that reduces silicon respins while mentoring engineers through complex timing and implementation challenges.
12 years of coding experience
12 years of employment as a software developer
Certificate of Chip Design Electrical and Electronics Engineering, Certificate of Chip Design Electrical and Electronics Engineering at Semicon IC Design Training CenterElectrical and Electronic Engineering Certificate of Education Level 2 Electrical and Electronic, Electrical and Electronic Engineering Certificate of Education Level 2 Electrical and Electronic at Ho Chi Minh city University of Technology and Education
English
Github Skills (5)
spring7
spring-boot7
spring-data7
java6
spring-security5
Programming languages (2)
Github contributions (5)
tuanngda/spring-boot-oauth2-demo
Apr 2016 - Jun 2017
Contributions:6 commits, 4 PRs, 5 pushes in 1 year 2 months
tuanngda/sgdev-blog
Mar 2014 - Sep 2014
Contributions:3 commits in 5 months
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