Nicolas Baez is a Senior Silicon Design Engineer at AMD with five years of hands-on experience bringing complex SoC test patterns and IP—most recently Infinity Fabric—up to silicon. He combines deep RTL and scan-domain debugging skills with scripting and tooling expertise (C++, Python, Perl, Ruby) to correlate waveform, scan, and pattern failures from GL to silicon. His background spans ATE test program development, DFT/scan verification, PCB and transistor-level layout, and ML/AI architecture, underpinned by an MS in Computer Engineering and a published thesis on low-latency FP MACs for DNN acceleration. Comfortable working across emulation, performance, and RTL teams, he often bridges verification and silicon validation in ways that reduce bring-up time and isolate root causes faster than traditional flows.
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Nicolas Baez - Senior Silicon Design Engineer at AMD