Nicolas Brunie is a Senior Principal Hardware Engineer based in California with a PhD in Computer Science and over a decade of specialized experience in floating-point units, vector execution, and RISC-V microarchitecture. He has progressed through technical and leadership roles at SiFive and Kalray, driving high-performance FPU and out-of-order vector designs, Chisel-based RTL flow automation, and PPA-driven micro-architecture iteration. His background uniquely combines compiler backend work, cryptographic co-processor design, and low-level software optimization—skills honed while developing LLVM backends, cryptography accelerators, and optimized math libraries during his PhD and industry roles. Known for bridging hardware and software, he has led teams building CNN accelerators and embedded ML stacks while still contributing deep RTL and algorithmic expertise. Colleagues rely on him for pragmatic architecture choices that squeeze frequency and efficiency out of modern cores without sacrificing standards compliance.
5 years of coding experience
11 years of employment as a software developer
M2, informatique fondamentale, M2, informatique fondamentale at École normale supérieure de Lyon
Doctor of Philosophy (PhD), Computer Science, Doctor of Philosophy (PhD), Computer Science at ENS de Lyon
Investigate and suggest RISC-V ISA Extensions to improve performance and efficiency in modern public-key cryptography, focusing on standard Post-Quantum Cryptography algorithms such as Kyber, Dilithium, and more.
Contributions:4 reviews, 53 PRs, 55 pushes in 1 year 3 months
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Nicolas Brunie - Senior Principal Hardware Engineer at SiFive