Nilesh Khiste is a Software Architect with 11+ years of experience building high-performance system software, currently leading architecture work at Cadence Design Systems. He combines deep expertise in C/C++ on UNIX/Linux with decades of domain knowledge in EDA—RTL simulation, low-power verification, and gate-level simulation—plus hands-on experience with VHDL/Verilog/SystemVerilog. Academically rigorous, he is completing a PhD in Computer Science from Western University with first-author publications on string algorithms for DNA sequencing and efficient genome assembly, reflecting strong algorithmic and research chops. He has implemented compiler-level optimizations and parsing data structures, and has applied machine learning techniques to algorithm design, bridging research and production-grade engineering. A proven technical leader, he has driven product enhancements, mentored R&D teams, and delivered compatibility and low-power features for commercial simulator products. Quietly interdisciplinary, he leverages bioinformatics research to inform novel algorithmic approaches in EDA and systems software.
11 years of coding experience
22 years of employment as a software developer
Indian Institute of Technology Delhi (IIT Delhi)
Doctor of Philosophy (Ph.D.), Computer Science, Doctor of Philosophy (Ph.D.), Computer Science at Western University
Bachelor's Degree, Computer Science, Bachelor's Degree, Computer Science at Banaras Hindu University
Contributions:6 pushes, 12 comments, 1 issue in 1 year 9 months
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Nilesh Khiste - Software Architect at Cadence Design Systems