P Coughlin is a Senior Engineering Manager with nearly two decades at Intel driving semiconductor assembly and test process innovations and leading diverse, 24x7 engineering teams across multiple fabs and technology nodes. He combines materials engineering expertise (BS Georgia Tech, MS Arizona State) with Lean and Six Sigma practices to deliver manufacturing methodologies and equipment—overseeing 40+ packaging underfill programs and cross-site deployments. His work spans from high-volume production support to novel research, including integrating shape-memory alloys into lead-free solder composites in collaboration with ASU. Based in Tempe, he recently transitioned into full-stack coding after completing a University of Arizona bootcamp, blending hands-on software curiosity with deep domain knowledge in microelectronics manufacturing.
8 years of coding experience
Master of Science - MS, Materials Engineering, Master of Science - MS, Materials Engineering at Arizona State University
Bachelor of Science - BS, Materials Engineering, Bachelor of Science - BS, Materials Engineering at Georgia Institute of Technology
Contributions:5 pushes, 1 branch in 1 year 5 months
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P Coughlin - Senior Engineering Manager at Intel Corporation