Paolo Spallaccini
Technical Architect at HCLTech
Milan, Lombardy, Italy
Summary
👤
Senior🎓
Top SchoolPaolo Spallaccini is a Technical Architect with over 9 years in senior roles and a two-decade track record in embedded systems, DSP and telecoms, currently shaping O-RAN ML/AI RIC applications and GPU-accelerated vRAN solutions at HCLTech. He combines hands-on algorithm and FPGA design experience with strategic leadership of medium-to-large multicultural engineering teams, repeatedly delivering PoCs and products showcased at MWC and ONF events. Paolo holds multiple patent filings (five as first inventor) and a strong publication/presentation record, reflecting a pragmatic research-to-product mindset. Deeply versed in SDN/NFV, container orchestration, Open-RAN, 5G/Wi‑Fi architectures and parallel/GPU computing, he excels at translating complex requirements into deployable systems. Colleagues rely on his ability to bridge sales, R&D and standards communities—an asset in fast-evolving, high-stakes telecom programs.
9 years of coding experience
15 years of employment as a software developer
Physics, Physics at Università degli Studi di PisaMSEE, Engineering, Full Marks, MSEE, Engineering, Full Marks at Università degli Studi di PerugiaLiceo Scientifico Statale " G.Galilei", Perugia
French, English, Italian
Github Skills (14)
poc10
php8
multi-agent-reinforcement-learning7
decision-making7
robotics7
distributed-computing6
reinforcement-learning5
primitive5
machine-learning5
pytorch5
deep-reinforcement-learning4
python4
modular4
ai3
Programming languages (2)
Github contributions (3)
spallaccini/ombd-query
Jun 2019 - Jun 2019
Contributions:5 pushes, 1 branch in 1 day
Open-Network-Models-and-Interfaces-ONMI/onmi-iisomi-xhaul-uml-yang
Oct 2016 - Jul 2017
5G xHaul PoC Applications
Contributions:32 commits, 21 pushes in 9 months
phppoc
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