Patrick Urban
Pre-Sales Engineer at Cologne Chip AG
Cologne, North Rhine-Westphalia, Germany
Summary
👤
Senior🎓
Top SchoolPatrick Urban is a Pre-Sales Engineer and M.Sc. with a decade of hands-on experience in digital design and embedded software, currently helping bring Germany’s first domestically produced FPGA to market at Cologne Chip. He blends deep technical expertise—demonstrated by contributions to the widely used Yosys synthesis suite and integrating Cologne Chip support into openFPGALoader—with customer-facing pre-sales and advanced support responsibilities. His work focuses on low-power, high-performance solutions in automation, control, and communications, backed by a supply chain and manufacturing footprint in Germany. Comfortable across RTL, toolchain internals, JTAG/SPI programming, and documentation, he translates complex hardware-software interactions into practical integration paths for customers. An open-source-minded engineer, he pairs product advocacy with concrete code contributions that improve synthesis, BRAM handling, and FPGA programming workflows.
10 years of coding experience
Bachelor of Science - BS, Bachelor of Science - BS at FH Aachen University of Applied SciencesMaster of Science - MS, Master of Science - MS at Universität Duisburg-Essen
Github Skills (13)
fpga10
yosys10
embedded10
verilog10
jtag10
spi10
sys10
test-automation9
cprogramming-language9
c-language9
gnu-make8
makefile8
xilinx3
Programming languages (3)
Github contributions (5)
YosysHQ/yosys
Sep 2021 - May 2022
Yosys Open SYnthesis Suite
Role in this project:
Back-end Developer
Back-end DeveloperContributions:22 reviews, 18 commits, 6 PRs in 8 months
Contributions summary:Patrick's contributions primarily revolve around modifying and improving the "synth_gatemate" pass within the Yosys Open SYnthesis Suite. They focused on refactoring, bug fixing, and enhancing the block RAM implementation. The user also made changes to the test suite, incorporating new testing practices and addressing initialization issues for register functionality. The user's work demonstrates a solid understanding of digital synthesis and hardware description languages.
synthesispythonsuiteyosys
trabucayre/openFPGALoader
Dec 2021 - Apr 2022
Universal utility for programming FPGA
Role in this project:Embedded Systems Engineer
Embedded Systems EngineerContributions:3 reviews, 13 commits, 7 PRs in 4 months
Contributions summary:Patrick's contributions primarily involve integrating support for the Cologne Chip GateMate FPGA series within the openFPGALoader utility. They implemented specific functionalities for programming the FPGA via JTAG and SPI, including handling hardware resets, configuration loading, and flash memory access. The user also made updates to documentation, demonstrating a commitment to improving usability and providing clear instructions for interacting with the supported hardware. The user demonstrates skills in interacting with SPI and JTAG interfaces to program an FPGA.
vivadoxilinxlatticeintelfpga-programming
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