Pau Cabre
Principal Hardware Engineer at Microsoft
Barcelona, Catalonia, Spain
Summary
👤
Senior🎓
Top SchoolPau Cabre is a Principal Hardware Engineer based in Barcelona with over a decade of experience designing high-performance silicon and system architectures, currently driving hardware efforts at Microsoft since 2018. His career includes 11 years at Intel working on Intel® Xeon Phi™ products—covering performance modeling, on-die interconnects and memory controller architecture—and four years as a silicon architecture engineer at Metempsy. Pau blends deep microarchitecture expertise with practical simulation work, contributing to the gem5 simulator to improve memory, cache and branch-prediction accuracy for multi‑CPU scenarios. He holds advanced computer science training from Universitat Politècnica de Catalunya and brings a hands-on, research-informed approach to solving complex performance and architectural challenges.
10 years of coding experience
13 years of employment as a software developer
Technical Engineer, Bachelor Degree in Computer Science, Computer Science, Technical Engineer, Bachelor Degree in Computer Science, Computer Science at Universitat Rovira i VirgiliUPC Universitat Politècnica de CatalunyaHonours Year Project (as Erasmus exchange student), Honours Year Project (as Erasmus exchange student) at University of Paisley
English, Catalan, Spanish
Github Skills (10)
simulations10
simulation10
arm10
c-language10
architectures10
cprogramming-language10
architecture10
python9
x868
x86-648
Programming languages (1)
Github contributions (5)
gem5/gem5
Dec 2015 - Mar 2019
The official repository for the gem5 computer-system architecture simulator.
Role in this project:
Back-end Developer
Back-end DeveloperContributions:18 commits in 3 years 3 months
Contributions summary:Pau contributed primarily to the core logic and functionality of the gem5 simulator. Their work involved fixing uninitialized variables that could lead to assertion failures, adding a Python script for generating ARM FS binaries, and addressing issues related to multi-CPU and multi-command execution in simulation environments. The user also implemented changes to improve the accuracy of the memory cache and branch prediction mechanisms. These contributions demonstrate a focus on improving simulation performance and functionality.
storedsimulationupstreamsimulatorgem5-simulator
metempsy/gem5_arm_fullsystem_files_generator
Apr 2017 - May 2018
Contributions:6 releases, 14 commits, 4 PRs in 1 year 1 month
kernelaprildisklinuxaarch32
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