Paul Rigge
Software Engineer at Google
San Francisco, California, United States
Summary
🤩
Rockstar🎓
Top SchoolPaul Rigge is a software engineer in San Francisco with 11 years of experience building software for hardware projects, specializing in digital hardware design for ASICs and FPGAs. He contributes deeply to the Chisel/FIRRTL ecosystem and related projects (including notable work on chisel-bootcamp, FIRRTL, Rocket Chip and Chipyard), improving compilers, build systems, and verification infrastructure. At Google since 2020, he brings production-grade compiler and tooling expertise—implementing passes, improving type inference, and hardening code generators and runtime checks. His background spans embedded FPGA signal-processing (JPL/CASPER) to RISC-V SoC peripherals, giving him a rare blend of low-level hardware know-how and high-quality software craftsmanship. Paul’s contributions to prominent open-source hardware projects and to Neovim and XLS show a habit of hunting subtle bugs and improving developer workflows across languages and toolchains. He holds advanced academic training from UC Berkeley and a dual BS in CS and EE from Michigan, which underpins his work at the intersection of hardware, compilers, and system tooling.
11 years of coding experience
1 year of employment as a software developer
Doctor of Philosophy (PhD), Electrical, Electronics and Communications Engineering, Doctor of Philosophy (PhD), Electrical, Electronics and Communications Engineering at University of California, BerkeleyBachelor of Science (B.S.), Computer Science Engineering, Bachelor of Science (B.S.), Computer Science Engineering at University of Michigan
Github Skills (38)
verilog10
compiler-development10
testing10
axi410
risc-v10
sbt10
build-system10
generator10
firrtl10
c1110
intermediate-code10
scala10
c1710
neovim10
compiler-design10
Programming languages (15)
Github contributions (5)
freechipsproject/chisel-bootcamp
Aug 2017 - Jan 2020
Generator Bootcamp Material: Learn Chisel the Right Way
Role in this project:
Back-end Developer
Back-end DeveloperContributions:83 commits, 25 PRs, 65 pushes in 2 years 5 months
Contributions summary:Paul contributed to the Chisel bootcamp by adding advanced Chisel code in the form of an iPython notebook. The commits include example code, likely a tutorial for other developers to use. This suggest the user focused on expanding the learning materials for the Chisel bootcamp.
chiselhardwarevhdl
google/xls
Oct 2020 - Jan 2023
XLS: Accelerated HW Synthesis
Role in this project:Back-end Developer
Back-end DeveloperContributions:38 reviews, 60 commits, 8 PRs in 2 years 3 months
Contributions summary:Paul primarily focused on improving the internal workings of the XLS compiler. Their commits involve modifying the DSLX interpreter to improve error messages and correct assertions, and expanding the IR to add functionality like the priority select operation. Additionally, the user updated code related to the build system and added tests. These changes demonstrate a focus on improving the compiler's functionality and reliability.
high-level-synthesisxlsacceleratedsynthesiscompiler
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