Paul White is an applications engineer based in Munich with four years of hands-on experience applying hardware and software to real-world problems, particularly in FPGA toolchains and high-level synthesis. He supported Intel's HLS compiler, helping users optimize complex C++ designs for FPGAs while creating examples, training materials, and product feedback loops that improved the tool. At Intel he also explored unconventional applications of technology, using virtual reality as a therapeutic modality for Alzheimer’s patients, showing a blend of engineering rigor and human-centered thinking. Now at Altera, he continues to bridge compute and configurable hardware to accelerate solutions. Trained as a computer engineer from the University of Manitoba, Paul pairs low-level technical expertise with practical deployment experience across diagnostics, testing, and network operations. He’s comfortable translating tricky design constraints into working FPGA implementations while documenting and teaching those patterns to others.
4 years of coding experience
7 years of employment as a software developer
Engineer's Degree Computer Engineering, Engineer's Degree Computer Engineering at University of Manitoba
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