Summary
Phil Cayton is a Principal Engineer with 11+ years in high-performance computing and AI infrastructure, based in Portland, Oregon, who drives architecture and open-ecosystem standards for scalable storage, fabric-agnostic management, and composable disaggregated infrastructures. At Intel he led development and standards work from first NVMe/RDMA transport prototypes to production NVMe-oF drivers and now steers industry efforts as a board director and workgroup co-chair across NVM Express, OpenFabrics Alliance, and SNIA initiatives. He blends deep kernel- and protocol-level engineering with systems-level thinking to connect containerized workloads to distributed resources, reducing idle hardware and energy waste in dynamic datacenter/HPC/AI environments. Notably, he has repeatedly translated research prototypes into award-winning, standards-based solutions that enable remote storage at scale and improve manageability across heterogeneous fabrics.
11 years of coding experience
31 years of employment as a software developer
MS, Computer Engineering, MS, Computer Engineering at Oregon Health & Science University
Bachelor's degree, Computer Science, Bachelor's degree, Computer Science at Oregon State University
English, Finnish