Summary
Phillip Bonhomme is an R&D software engineer with 10 years of experience at the intersection of EDA, compilers, and semiconductor device modeling, currently on staff at Synopsys in Portland. He has a strong background in simulation and tool development for FPGA NoC, DFT test synthesis, and Verilog/VHDL static analysis, with prior roles at Xilinx, Siemens, and Blue Pearl. Early research work on spintronic devices produced analytical models that remain useful for novel circuit simulation and informed faster micromagnetics benchmarks. At Intel he combined data-driven model fitting and CI tooling to improve transistor simulation accuracy and UPF robustness, demonstrating both device-level insight and developer productivity engineering. Phillip blends deep hardware knowledge with practical software craftsmanship in C++/SystemC and data tooling (pandas), making him effective at shrinking runtimes and hardening EDA workflows.
10 years of coding experience
11 years of employment as a software developer
Master of Science (M.S.) Computer Engineering, Master of Science (M.S.) Computer Engineering at Georgia Institute of Technology
Bachelor of Science Computer Engineering, Bachelor of Science Computer Engineering at University of Louisiana at Lafayette
English