Pierluigi Picciau is a Senior Staff Verification Engineer based in Munich with 14 years of hands-on experience in pre-silicon verification for complex SoC blocks and integrations. He has progressed through technical verification roles at Socionext Europe and earlier consultancy work with Ogheri, NXP, Infineon and Imagination, specializing in SystemVerilog UVM, Specman/"e", constrained-random verification and automation of regression flows. Pierluigi routinely delivers block- and top-level verification environments, functional coverage plans and debug workflows for protocol IPs such as AMBA AHB and Ethernet, and has a track record of bridging external consulting with long-term in-house engineering. Trained as an engineer at Università degli Studi di Padova, he combines deep verification language expertise with practical automation and integration skills that accelerate tapeout readiness. An understated strength is his ability to move between consultancy-style short engagements and sustained product-team ownership, making him effective at both ramping designs quickly and driving long-lived verification infrastructure.
14 years of coding experience
7 years of employment as a software developer
Laurea Magistrale in Ingegneria Informatica, Laurea Magistrale in Ingegneria Informatica at Università degli Studi di Padova
Ingegnere dell'Informazione Sez. A, Ingegnere dell'Informazione Sez. A at Esame di Stato per l'abilitazione all’esercizio della professione di Ingegnere
Maturità scientifica, Maturità scientifica at Liceo Scientifico Galilei (Dolo - VE)
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